JPH0363946U - - Google Patents
Info
- Publication number
- JPH0363946U JPH0363946U JP1989124531U JP12453189U JPH0363946U JP H0363946 U JPH0363946 U JP H0363946U JP 1989124531 U JP1989124531 U JP 1989124531U JP 12453189 U JP12453189 U JP 12453189U JP H0363946 U JPH0363946 U JP H0363946U
- Authority
- JP
- Japan
- Prior art keywords
- frame
- semiconductor chips
- upper lid
- electronic components
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 5
- 229920001187 thermosetting polymer Polymers 0.000 claims 2
- 238000013007 heat curing Methods 0.000 claims 1
- 238000000465 moulding Methods 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000012790 adhesive layer Substances 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989124531U JPH0530363Y2 (en]) | 1989-10-26 | 1989-10-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1989124531U JPH0530363Y2 (en]) | 1989-10-26 | 1989-10-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0363946U true JPH0363946U (en]) | 1991-06-21 |
| JPH0530363Y2 JPH0530363Y2 (en]) | 1993-08-03 |
Family
ID=31672442
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1989124531U Expired - Lifetime JPH0530363Y2 (en]) | 1989-10-26 | 1989-10-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0530363Y2 (en]) |
-
1989
- 1989-10-26 JP JP1989124531U patent/JPH0530363Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0530363Y2 (en]) | 1993-08-03 |